Semiconductor industry has experienced continued rapid growth due to continuous improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area. Three-dimensional (3D) integrated circuits (ICs) are therefore created to resolve the limitations of the number and length of interconnections between devices as the number of devices increases. Dies-to-wafer stack bonding is one method for forming 3D ICs, wherein one or more die is bonded to a wafer, and the size of dies may be smaller than the size of chips on the wafer. In order to reduce the thickness of semiconductor packages, increase the chip speed, and for high-density fabrication, efforts to reduce the thickness of a semiconductor wafer are in progress. Accordingly, one of the important aspects of 3D technology process is how to handle wafer thinning. A typical process for temporary bonding involves the carrier wafer and/or the device wafer being coated with an adhesive, bonding of the device wafer and the carrier, processing of the device wafers and then removal of the carrier.
Thickness reduction is performed by so-called backside grinding of a semiconductor wafer on the surface opposite that containing pattern-formed circuitry, on which a carrier is typically attached to support wafer handling through an adhesive material. Because the thinned wafer tends to have insufficient strength and is more susceptible to deformation such as bending and/or warping, a surface of the wafer is then encapsulated in a molding compound (e.g., thermo-curing epoxy resin), prior to the wafer being separated into individual chip packages using a dicing process. However, conventional method exposes a portion of the adhesive material at the wafer edge, so that the wafer edge is easily attacked in subsequent etching process, e.g., a wet etch or dry etch process to become chipped after detaching the carrier. Especially when a thermosetting adhesive material is used, the device wafer backside process with high temperature makes the adhesion strength stronger than that of low-k film in the device wafer so as to induce damages to the low-k film during the carrier detaching process. Also, the adhesive material may get lower viscosity during the backside process, so that the adhesive may flow into the glass carrier to arise other issues.